/*
 * sum_var.c
 *
 *  Created on: 14/03/2017

 *      Author: pedro

 */

#ifndef __OPENCL_VERSION__

#include <stddef.h>
#include <stdio.h>

#include "sum_var.h"

#include "../bitmaps.h"
#include "../config.h"
#include "../variables.h"

#endif

#include "../kernels/cl_aux_functions.h"
#if CL_D_TYPE == CL_BITMAP
#include "../kernels/cl_bitmaps.h"
#elif CL_D_TYPE == CL_INTERVAL
#include  "../kernels/cl_intervals.h"
#endif
#include "../kernels/cl_constraints.h"
#include "../kernels/cl_variables.h"
#include "../kernels/cl_ttl.h"

#ifndef __OPENCL_VERSION__

/*

 * Creates a new constraint of the sum_var_ type and return the constraint ID

 * sum(X, y)
 * X_ids - vector with the ID of the variables that may contain the value of y
 * n_vs - maximum number of variables in X vector
 * y_id - ID of the variable that contains the sum of all the variables in X
 */

unsigned int c_sum_var(unsigned int* X_ids, unsigned int n_vs, unsigned int y_id) {

	unsigned int i;

	// set to include in kernel compilation
	USE_CS[SUM_VAR] = 1;
	USE_NON_CS_REIFI[SUM_VAR] = 1;
	REV = 1;

	unsigned int* c_vs = malloc((n_vs + 1) * sizeof(unsigned int));

	for (i = 0; i < n_vs; i++) {
		c_vs[i] = X_ids[i];
	}
	c_vs[n_vs] = y_id;

	// creates a new generic constraint
	unsigned int c_id = c_new(c_vs, n_vs + 1, NULL, 0, -1);

	// pointers to this type of constraint functions
	CS[c_id].kind = SUM_VAR;
	CS[c_id].check_sol_f = &sum_var_check;
	CS[c_id].constant_val = 0;

	CS[c_id].boolean = true;
	for (i = 0; i < n_vs; i++) {

		if (!VS[c_vs[i]].boolean) {
			CS[c_id].boolean = false;
		}
	}

	free(c_vs);

	return c_id;
}

/*

 * Creates a new reified constraint of the sum_var_ type and return the constraint ID

 * sum(X, y)
 * X_ids - vector with the ID of the variables that may contain the value of y
 * n_vs - maximum number of variables in X vector
 * y_id - ID of the variable that contains the sum of all the variables in X
 * reif_v_id - ID of the reification variable
 */

unsigned int c_sum_var_reif(unsigned int* X_ids, unsigned int n_vs, unsigned int y_id, int reif_v_id) {

	unsigned int i;

	if (VS[reif_v_id].max > 1) {
		v_del_gt(&VS[reif_v_id], 1);

		if (VS[reif_v_id].n_vals == 0) {

			fprintf(stderr, "\nError: Constraint SUM_VAR_REIF makes model inconsistent at creation:\n");
			exit(-1);
		}
	}

	// set to include in kernel compilation
	USE_CS[SUM_VAR] = 1;
	USE_CS_REIFI[SUM_VAR] = 1;

	REV = 1;

	unsigned int* c_vs = malloc((n_vs + 1) * sizeof(unsigned int));

	for (i = 0; i < n_vs; i++) {
		c_vs[i] = X_ids[i];
	}
	c_vs[n_vs] = y_id;

	// creates a new generic constraint
	unsigned int c_id = c_new(c_vs, n_vs + 1, NULL, 0, reif_v_id);

	// pointers to this type of constraint functions
	CS[c_id].kind = SUM_VAR;
	CS[c_id].check_sol_f = &sum_var_check;
	CS[c_id].constant_val = 0;

	free(c_vs);

	return c_id;
}

/*
 * Return true if the sum_var_ constraint is respected or false if not
 * sum(X, y)
 * c - constraint to check if is respected
 * explored - if the CSP was already explored, which mean that all the variables must already be singletons
 * */
bool sum_var_check(constr* c, bool explored) {

	var** X = c->c_vs;

	var* y = c->c_vs[c->n_c_vs - 1];
	var* x;
	int sum = 0;
	int i;

	for (i = 0; i < c->n_c_vs - 1; i++) {
		x = X[i];

#if CHECK_SOL_N_VALS
		if (x->to_label && x->n_vals != 1) {
			if (explored) {

				fprintf(stderr, "\nError: Constraint SUM_VAR (%d) not respected:\n", c->c_id);
				for (i = 0; i < c->n_c_vs; i++) {
					fprintf(stderr, "Variable ID=%u -> minimum=%u, maximum=%u, number of values=%u\n\n", c->c_vs[i]->v_id, b_get_min_val(&c->c_vs[i]->domain_b),
							b_get_max_val(&c->c_vs[i]->domain_b), b_cnt_vals(&c->c_vs[i]->domain_b));

				}

			}
			return false;
		}
#endif
		sum += x->min;
	}

	if (

#if CHECK_SOL_N_VALS
			(y->to_label && y->n_vals != 1) ||
#endif
			sum != y->min) {
		if (explored) {

			fprintf(stderr, "\nError: Constraint SUM_VAR (%d) not respected:\n", c->c_id);

			for (i = 0; i < c->n_c_vs; i++) {

				fprintf(stderr, "Variable ID=%u -> minimum=%u, maximum=%u, number of values=%u\n\n", c->c_vs[i]->v_id, b_get_min_val(&c->c_vs[i]->domain_b),
						b_get_max_val(&c->c_vs[i]->domain_b), b_cnt_vals(&c->c_vs[i]->domain_b));

			}

		}
		return false;
	}

	return true;
}

#endif

#if CS_SUM_VAR == 1
/*
 * Propagate the domain of the variable with the ID prop_v_id through all the other variables on the same c_numb ID sum_var constraint
 * sum(X, y)
 * prop_ok will be set to 1 if success or to 0 if any domain became empty
 * vs_per_c_idx - vector with all constrained variables ID per constraint, per constraint ID order
 * vs_prop_ - all CSP variables with current step values
 * prop_v_id - variable ID to propagate
 * current_cs - constraint that should be propagated for the variable with prop_v_id ID
 * vs_id_to_prop_ - circular vector with the ids of the variables to propagate
 */
CUDA_FUNC void sum_var_prop(CL_INTS_MEM int* vs_per_c_idx, CL_MEMORY VARS_PROP* vs_prop_, CL_CS_MEM cl_constr* current_cs, CL_MEMORY unsigned short* vs_id_to_prop_,
		bool* prop_ok, __global int* terms_mem CS_IGNORE_FUNC TTL_CTR) {

	int y_idx = current_cs->n_c_vs - 1;
	int y_id = vs_per_c_idx[y_idx];
	int x_id;
	__global int* mins = terms_mem;

	__global int* maxs = &terms_mem[current_cs->n_c_vs];
	int min, max;

	int val_to_rmv;
	bool changed = 0;

	int i;

	mins[y_idx] = V_MIN(vs_prop_[y_id]);

	maxs[y_idx] = V_MAX(vs_prop_[y_id]);

	// if the sum of the minimums of x is greater than maximum of y
	// if the sum of the maximums of x is lesser than the minimum of y
	min = 0;
	max = 0;

	for (i = 0; i < y_idx; i++) {
		CHECK_TTL(ttl_ctr, 96)

		x_id = vs_per_c_idx[i];
		min += mins[i] = V_MIN(vs_prop_[x_id]);
		max += maxs[i] = V_MAX(vs_prop_[x_id]);
	}


	if (min > maxs[y_idx] || max < mins[y_idx]) {
		*prop_ok = 0;
		return;
	}

	// set all X because their min values sum is equal to the y max
	if (min == maxs[y_idx]) {
		for (i = 0; i < y_idx; i++) {
			CHECK_TTL(ttl_ctr, 167)
			x_id = vs_per_c_idx[i];

			if (V_N_VALS(vs_prop_[x_id]) > 1) {
				cl_v_del_all_except_val_m(&changed, &vs_prop_[x_id], mins[i] TTL_CTR_V);

				v_add_to_prop(vs_id_to_prop_, vs_prop_, x_id);
			}
		}
		if (V_N_VALS(vs_prop_[y_id]) > 1) {
			cl_v_del_all_except_val_m(&changed, &vs_prop_[y_id], maxs[y_idx] TTL_CTR_V);
			v_add_to_prop(vs_id_to_prop_, vs_prop_, y_id);
		}

#if CL_CS_IGNORE
		cs_ignore[current_cs->c_id] = 1;
#endif

		return;
	}

	// set all X because their max values sum is equal to the y min
	if (max == mins[y_idx]) {
		for (i = 0; i < y_idx; ++i) {
			CHECK_TTL(ttl_ctr, 168)
			x_id = vs_per_c_idx[i];

			if (V_N_VALS(vs_prop_[x_id]) > 1) {
				cl_v_del_all_except_val_m(&changed, &vs_prop_[x_id], maxs[i] TTL_CTR_V);
				v_add_to_prop(vs_id_to_prop_, vs_prop_, x_id);
			}
		}
		if (V_N_VALS(vs_prop_[y_id]) > 1) {
			cl_v_del_all_except_val_m(&changed, &vs_prop_[y_id], mins[y_idx] TTL_CTR_V);
			v_add_to_prop(vs_id_to_prop_, vs_prop_, y_id);
		}

#if CL_CS_IGNORE
		cs_ignore[current_cs->c_id] = 1;
#endif

		return;
	}

	// remove bounds from all x
#if CL_BOOLEAN_VS
	if (current_cs->boolean == 0) {	// not all X are boolean
#endif
		for (i = 0; i < y_idx; i++) {
			CHECK_TTL(ttl_ctr, 98)
			x_id = vs_per_c_idx[i];

			changed = 0;
			if (V_N_VALS(vs_prop_[x_id]) > 1) {

				val_to_rmv = mins[i] + maxs[y_idx] - min;
				if (val_to_rmv < maxs[i]) {

					min -= mins[i];

					max -= maxs[i];

					cl_v_del_gt_m(&changed, &vs_prop_[x_id], val_to_rmv TTL_CTR_V);

					if (V_IS_EMPTY(vs_prop_[x_id])) {
						*prop_ok = 0;
						return;
					}
					v_add_to_prop(vs_id_to_prop_, vs_prop_, x_id);

					min += mins[i] = V_MIN(vs_prop_[x_id]);
					max += maxs[i] = V_MAX(vs_prop_[x_id]);
				}

				val_to_rmv = maxs[i] - (max - mins[y_idx]);
				if (val_to_rmv > mins[i]) {

					min -= mins[i];
					max -= maxs[i];

					cl_v_del_lt_m(&changed, &vs_prop_[x_id], val_to_rmv TTL_CTR_V);

					if (V_IS_EMPTY(vs_prop_[x_id])) {
						*prop_ok = 0;
						return;
					}
					v_add_to_prop(vs_id_to_prop_, vs_prop_, x_id);

					min += mins[i] = V_MIN(vs_prop_[x_id]);
					max += maxs[i] = V_MAX(vs_prop_[x_id]);
				}
			}
		}
#if CL_BOOLEAN_VS
	}
#endif

	if (min > mins[y_idx]) {
		cl_v_del_lt_m(&changed, &vs_prop_[y_id], min TTL_CTR_V);

		if (V_IS_EMPTY(vs_prop_[y_id])) {
			*prop_ok = 0;
			return;
		}
		v_add_to_prop(vs_id_to_prop_, vs_prop_, y_id);
	}

	if (max < maxs[y_idx]) {
		cl_v_del_gt_m(&changed, &vs_prop_[y_id], max TTL_CTR_V);

		if (V_IS_EMPTY(vs_prop_[y_id])) {
			*prop_ok = 0;
			return;
		}
		v_add_to_prop(vs_id_to_prop_, vs_prop_, y_id);
	}
}

#if CS_R_SUM_VAR == 1
/*
 * Validate sum_var constraint to be normally propagated, when reified
 * sum(X, y)
 * vs_per_c_idx - vector with all constrained variables ID per constraint, per constraint ID order
 * vs_prop_ - all CSP variables with current step values
 * current_cs - constraint that should be propagated for the variable with prop_v_id ID
 * vs_id_to_prop_ - circular vector with the ids of the variables to propagate
 */
CUDA_FUNC void sum_var_reif( CL_INTS_MEM int* vs_per_c_idx, CL_MEMORY VARS_PROP* vs_prop_, CL_CS_MEM cl_constr* current_cs, CL_MEMORY unsigned short* vs_id_to_prop_,
		__global int* terms_mem	CS_IGNORE_FUNC TTL_CTR) {

	int sum = current_cs->n_c_vs - 1;
	int y_id = vs_per_c_idx[sum];
	VARS_PROP y;
	int x_id;
	VARS_PROP x;
	__global int* mins = terms_mem;
	__global int* maxs = &terms_mem[current_cs->n_c_vs];
	int min, max;
	bool changed = 0;

	bool all_singl = true;

	int i;

	mins[sum] = V_MIN(vs_prop_[y_id]);

	maxs[sum] = V_MAX(vs_prop_[y_id]);

	// if the sum of the minimums of x is greater than maximum of y
	min = 0;
	for (i = 0; i < sum; i++) {
		CHECK_TTL(ttl_ctr, 99)

		min += mins[i] = V_MIN(vs_prop_[i]);

		if (V_N_VALS(vs_prop_[i]) != 1) {
			all_singl = false;
		}

		if (min > maxs[sum]) {
			cl_v_bool_del_val_m(&vs_prop_[current_cs->reif_var_id], 1 TTL_CTR_V);
			v_add_to_prop(vs_id_to_prop_, vs_prop_, convert_int(current_cs->reif_var_id));

#if CL_CS_IGNORE
		cs_ignore[current_cs->c_id] = 1;
#endif
			return;
		}
	}

	if (V_N_VALS(vs_prop_[y_id]) == 1 && all_singl && min == V_MIN(vs_prop_[y_id])) {
		cl_v_bool_del_val_m(&vs_prop_[current_cs->reif_var_id], 0 TTL_CTR_V);
		v_add_to_prop(vs_id_to_prop_, vs_prop_, convert_int(current_cs->reif_var_id));

#if CL_CS_IGNORE

		cs_ignore[current_cs->c_id] = 1;

#endif
		return;

	}

	// if the sum of the maximums of x is lesser than the minimum of y
	max = 0;
	for (i = 0; i < sum; i++) {
		CHECK_TTL(ttl_ctr, 100)
		max += maxs[i] = V_MAX(vs_prop_[i]);
	}

	if (max < mins[sum]) {
		cl_v_bool_del_val_m(&vs_prop_[current_cs->reif_var_id], 1 TTL_CTR_V);
		v_add_to_prop(vs_id_to_prop_, vs_prop_, convert_int(current_cs->reif_var_id));

#if CL_CS_IGNORE
		cs_ignore[current_cs->c_id] = 1;
#endif
		return;
	}

	// remove bounds from all x
#if CL_BOOLEAN_VS
	if (current_cs->boolean == 0) {	// not all X are boolean
#endif
		for (i = 0; i < sum; i++) {
			CHECK_TTL(ttl_ctr, 101)

			x_id = vs_per_c_idx[i];

			cl_v_copy_pm(&x, &vs_prop_[x_id] TTL_CTR_V);
			changed = 0;

			if (V_N_VALS(vs_prop_[x_id]) > 1) {
				if (mins[i] + maxs[sum] - min < maxs[i]) {
					cl_v_del_gt_n(&changed, &x, mins[i] + maxs[sum] - min TTL_CTR_V);

					changed = 1;

				}

				if (maxs[i] - (max - mins[sum]) > mins[i]) {
					cl_v_del_lt_n(&changed, &x, maxs[i] - (max - mins[sum]) TTL_CTR_V);

					changed = 1;
				}

				if (V_IS_EMPTY(x)) {
					cl_v_bool_del_val_m(&vs_prop_[current_cs->reif_var_id], 1 TTL_CTR_V);
					v_add_to_prop(vs_id_to_prop_, vs_prop_, convert_int(current_cs->reif_var_id));
					return;
				}
			}
		}
#if CL_BOOLEAN_VS
	}

#endif

	cl_v_copy_pm(&y, &vs_prop_[y_id] TTL_CTR_V);
	if (min > mins[sum]) {
		cl_v_del_lt_n(&changed, &y, min TTL_CTR_V);

		if (V_IS_EMPTY(y)) {

			cl_v_bool_del_val_m(&vs_prop_[current_cs->reif_var_id], 1 TTL_CTR_V);

			v_add_to_prop(vs_id_to_prop_, vs_prop_, convert_int(current_cs->reif_var_id));
			return;
		}
	}

	if (max < maxs[sum]) {
		cl_v_del_gt_n(&changed, &y, max TTL_CTR_V);

		if (V_IS_EMPTY(y)) {
			cl_v_bool_del_val_m(&vs_prop_[current_cs->reif_var_id], 1 TTL_CTR_V);
			v_add_to_prop(vs_id_to_prop_, vs_prop_, convert_int(current_cs->reif_var_id));
		}
	}
}

/*
 * Propagate the domain of the variable with the ID prop_v_id through all the other variables on the same c_numb ID sum_var opposite constraint
 * !sum(X, y)
 * vs_per_c_idx - vector with all constrained variables ID per constraint, per constraint ID order
 * vs_prop_ - all CSP variables with current step values
 * prop_v_id - variable ID to propagate
 * current_cs - constraint that should be propagated for the variable with prop_v_id ID
 * vs_id_to_prop_ - circular vector with the ids of the variables to propagate
 */

CUDA_FUNC void sum_var_prop_opposite(CL_INTS_MEM int* vs_per_c_idx, CL_MEMORY VARS_PROP* vs_prop_, CL_CS_MEM cl_constr* current_cs, bool* prop_ok, __global int* terms_mem TTL_CTR) {

	int sum = current_cs->n_c_vs - 1;
	int y_id = vs_per_c_idx[sum];
	__global int* mins = terms_mem;
	int min, max;
	int i;

	mins[sum] = V_MIN(vs_prop_[y_id]);

	// if the sum of the minimums of x is equal to y

	min = 0;
	max = 0;

	for (i = 0; i < sum; i++) {

		CHECK_TTL(ttl_ctr, 228)
		min += V_MIN(vs_prop_[i]);

		max += V_MAX(vs_prop_[i]);
	}

	if (min == max && min == mins[sum] && V_N_VALS(vs_prop_[y_id]) == 1) {

		*prop_ok = 0;
		return;
	}
}

#endif

CUDA_FUNC void sum_var_propagate(CL_INTS_MEM int* vs_per_c_idx, CL_MEMORY VARS_PROP* vs_prop_, CL_CS_MEM cl_constr* current_cs, CL_MEMORY unsigned short* vs_id_to_prop_,
		bool* prop_ok, __global int* terms_mem PROPAGATED_FUNC CS_IGNORE_FUNC TTL_CTR) {

#if CS_R_SUM_VAR == 0
	sum_var_prop(vs_per_c_idx, vs_prop_, current_cs, vs_id_to_prop_, prop_ok, terms_mem CS_IGNORE_CALL TTL_CTR_V);

#if CL_STATS == 1
	*propagated = true;
#endif

#elif CS_R_SUM_VAR == 1
	if (current_cs->reified == 1) {
		if (V_N_VALS(vs_prop_[current_cs->reif_var_id]) > 1) {
			sum_var_reif(vs_per_c_idx, vs_prop_, current_cs, vs_id_to_prop_, terms_mem CS_IGNORE_CALL TTL_CTR_V);

		} else {
			if (V_MIN(vs_prop_[current_cs->reif_var_id]) == 1) {
				sum_var_prop(vs_per_c_idx, vs_prop_, current_cs, vs_id_to_prop_, prop_ok, terms_mem CS_IGNORE_CALL TTL_CTR_V);
			} else {
				sum_var_prop_opposite(vs_per_c_idx, vs_prop_, current_cs, prop_ok, terms_mem TTL_CTR_V);
			}
#if CL_STATS == 1
			*propagated = true;
#endif
		}
	} else {

		sum_var_prop(vs_per_c_idx, vs_prop_, current_cs, vs_id_to_prop_, prop_ok, terms_mem CS_IGNORE_CALL TTL_CTR_V);
#if CL_STATS == 1
		*propagated = true;

#endif
	}
#endif
}

#endif