/*
 * int_div.h
 *
 *  Created on: 20/02/2020
 *      Author: Pedro
 */

#ifndef __OPENCL_VERSION__

#include <stddef.h>
#include <stdio.h>

#include "int_div.h"

#include "../bitmaps.h"
#include "../config.h"
#include "../variables.h"

#endif

#include "../kernels/cl_aux_functions.h"
#if CL_D_TYPE == CL_BITMAP
#include "../kernels/cl_bitmaps.h"
#elif CL_D_TYPE == CL_INTERVAL
#include  "../kernels/cl_intervals.h"
#endif
#include "../kernels/cl_constraints.h"
#include "../kernels/cl_variables.h"
#include "../kernels/cl_ttl.h"

#ifndef __OPENCL_VERSION__

/*
 * Creates a new constraint of the int_div type and return the constraint ID
 * x = y / z
 * x_id - ID of variable x
 * y_id - ID of variable y
 * z_id - ID of variable z
 */
unsigned int c_int_div(unsigned int x_id, unsigned int y_id, unsigned int z_id) {

	// set to include in kernel compilation
	USE_CS[INT_DIV] = 1;
	USE_NON_CS_REIFI[INT_DIV] = 1;
	REV = 1;

	unsigned int c_vs[3];
	c_vs[0] = x_id;
	c_vs[1] = y_id;
	c_vs[2] = z_id;

	// creates a new generic constraint
	unsigned int c_id = c_new(c_vs, 3, NULL, 0, -1);

	// pointers to this type of constraint functions
	CS[c_id].kind = INT_DIV;
	CS[c_id].check_sol_f = &int_div_check;
	CS[c_id].constant_val = 0;

	return c_id;
}

/*
 * Creates a new reified constraint of the int_div type and return the constraint ID
 * x = y / z
 * x_id - ID of variable x
 * y_id - ID of variable y
 * z_id - ID of variable z
 * reif_v_id - ID of the reification variable
 */
unsigned int c_int_div_reif(unsigned int x_id, unsigned int y_id, unsigned int z_id, int reif_v_id) {

	if (VS[reif_v_id].max > 1) {
		v_del_gt(&VS[reif_v_id], 1);

		if (VS[reif_v_id].n_vals == 0) {
			printf("\nConstraint INT_DIV_REIF makes model inconsistent at creation. No solution found.\n");

#if defined(WIN32) || defined(_WIN32) || defined(__WIN32) && !defined(__CYGWIN__)
			printf("\nPress any key to exit\n");
			int a = getchar();
#endif

			exit(0);
		}
	}

	// set to include in kernel compilation
	USE_CS[INT_DIV] = 1;
	USE_CS_REIFI[INT_DIV] = 1;
	REV = 1;

	unsigned int c_vs[3];
	c_vs[0] = x_id;
	c_vs[1] = y_id;
	c_vs[2] = z_id;

	// creates a new generic constraint
	unsigned int c_id = c_new(c_vs, 3, NULL, 0, reif_v_id);

	// pointers to this type of constraint functions
	CS[c_id].kind = INT_DIV;
	CS[c_id].check_sol_f = &int_div_check;
	CS[c_id].constant_val = 0;

	return c_id;
}

/*
 * Return true if the int_div constraint is respected or false if not
 * x = y / z
 * c - constraint to check if is respected
 * explored - if the CSP was already explored, which mean that all the variables must already be singletons
 * */
bool int_div_check(constr *c, bool explored) {

	unsigned int i;

	if (!explored) {
		for (i = 0; i < c->n_c_vs; i++) {
			if (c->c_vs[i]->n_vals > 1) {
				return false;
			}
		}
	}

	if (c->reified && VS[c->reif_v_id].n_vals > 1) {
		if (explored) {
			fprintf(stderr, "\nError: Reification variable of constraint INT_DIV_REIF (%d) has 2 values.\n", c->c_id);
			return false;
		}
	}

	if (((!c->reified || (c->reified && VS[c->reif_v_id].min == 1)) && (c->c_vs[0]->min != c->c_vs[1]->min / c->c_vs[2]->min))
			|| (c->reified && VS[c->reif_v_id].min == 0 && (c->c_vs[0]->min == c->c_vs[1]->min / c->c_vs[2]->min))) {

		if (explored) {

			if (c->reified) {
				fprintf(stderr, "\nError: Constraint INT_DIV_REIF (%d) not respected:\n", c->c_id);
				fprintf(stderr, "Reif ID=%u -> minimum=%u, maximum=%u, number of values=%u\n\n", c->reif_v_id, b_get_min_val(&VS[c->reif_v_id].domain_b),
						b_get_max_val(&VS[c->reif_v_id].domain_b), b_cnt_vals(&VS[c->reif_v_id].domain_b));

			} else {
				fprintf(stderr, "\nError: Constraint INT_DIV (%d) not respected:\n", c->c_id);
			}

			fprintf(stderr, "Variable ID=%u -> minimum=%u, maximum=%u, number of values=%u\n\n", c->c_vs[0]->v_id, b_get_min_val(&c->c_vs[0]->domain_b),
					b_get_max_val(&c->c_vs[0]->domain_b), b_cnt_vals(&c->c_vs[0]->domain_b));
			fprintf(stderr, "Variable ID=%u -> minimum=%u, maximum=%u, number of values=%u\n\n", c->c_vs[1]->v_id, b_get_min_val(&c->c_vs[1]->domain_b),
					b_get_max_val(&c->c_vs[1]->domain_b), b_cnt_vals(&c->c_vs[1]->domain_b));
			fprintf(stderr, "Variable ID=%u -> minimum=%u, maximum=%u, number of values=%u\n\n", c->c_vs[2]->v_id, b_get_min_val(&c->c_vs[2]->domain_b),
					b_get_max_val(&c->c_vs[2]->domain_b), b_cnt_vals(&c->c_vs[2]->domain_b));
		}
		return false;
	}

	return true;
}

#endif

#if CS_INT_DIV == 1
/*
 * Propagate the domain of the variable with the ID prop_v_id through all the other variables on the same c_numb ID int_div constrain
 * x = y / z
 * vs_per_c_idx - vector with all constrained variables ID per constraint, per constraint ID order
 * vs_prop_ - all CSP variables with current step values
 * vs_id_to_prop_ - circular vector with the ids of the variables to propagate
 * prop_ok - will be set to 1 or 0 if the constraint is respected or not
 */
CUDA_FUNC void int_div_prop(CL_INTS_MEM int *vs_per_c_idx, CL_MEMORY VARS_PROP *vs_prop_, CL_MEMORY unsigned short *vs_id_to_prop_,
		bool *prop_ok TTL_CTR) {

	int x_id = vs_per_c_idx[0];
	int y_id = vs_per_c_idx[1];
	int z_id = vs_per_c_idx[2];
	int min_x, max_x;
	bool changed;

	min_x = V_MIN(vs_prop_[y_id]) / V_MAX(vs_prop_[z_id]);
	max_x = V_MAX(vs_prop_[y_id]) / V_MIN(vs_prop_[z_id]);

	cl_v_del_lt_m(&changed, &vs_prop_[x_id], min_x TTL_CTR_V);
	if (changed) {
		if (V_IS_EMPTY(vs_prop_[x_id])) {
			*prop_ok = 0;
			return;
		}
		v_add_to_prop(vs_id_to_prop_, vs_prop_, x_id);
	}
	cl_v_del_gt_m(&changed, &vs_prop_[x_id], max_x TTL_CTR_V);
	if (changed) {
		if (V_IS_EMPTY(vs_prop_[x_id])) {
			*prop_ok = 0;
			return;
		}
		v_add_to_prop(vs_id_to_prop_, vs_prop_, x_id);
	}
}

#if CS_R_INT_DIV == 1
/*
 * Validate int_div constraint to be normally propagated, when reified
 * x = y / z
 * vs_per_c_idx - vector with all constrained variables ID per constraint, per constraint ID order
 * vs_prop_ - all CSP variables with current step values
 * prop_v_id - ID of the variable to propagate
 * current_cs - constraint that should be propagated for the variable with prop_v_id ID
 * vs_id_to_prop_ - circular vector with the ids of the variables to propagate
 */
CUDA_FUNC void int_div_reif( CL_INTS_MEM int *vs_per_c_idx, CL_MEMORY VARS_PROP *vs_prop_, unsigned int prop_v_id, CL_CS_MEM cl_constr *current_cs,
		CL_MEMORY unsigned short *vs_id_to_prop_ CS_IGNORE_FUNC TTL_CTR) {

	int x_id = vs_per_c_idx[0];
	int y_id = vs_per_c_idx[1];
	int z_id = vs_per_c_idx[2];
	bool changed = 0;

	if (V_N_VALS(vs_prop_[x_id])
			== 1&& V_N_VALS(vs_prop_[y_id]) == 1 && V_N_VALS(vs_prop_[z_id]) == 1 && V_MIN(vs_prop_[x_id]) == V_MIN(vs_prop_[y_id]) / V_MIN(vs_prop_[z_id])) {

		cl_v_bool_del_val_m(&vs_prop_[current_cs->reif_var_id], 0 TTL_CTR_V);
		v_add_to_prop(vs_id_to_prop_, vs_prop_, convert_int (current_cs->reif_var_id));

#if CL_CS_IGNORE
		cs_ignore[current_cs->c_id] = 1;
#endif
		return;
	}

	if (prop_v_id == (unsigned int) x_id) {

		VARS_PROP y;
		cl_v_copy_pm(&y, &vs_prop_[y_id] TTL_CTR_V);

		cl_v_del_lt_n(&changed, &y, V_MIN(vs_prop_[x_id]) * V_MIN(vs_prop_[z_id])TTL_CTR_V);
		if (V_IS_EMPTY(y)) {
			cl_v_bool_del_val_m(&vs_prop_[current_cs->reif_var_id], 1 TTL_CTR_V);
			v_add_to_prop(vs_id_to_prop_, vs_prop_, convert_int (current_cs->reif_var_id));
			return;
		}
		cl_v_del_gt_n(&changed, &y, V_MAX(vs_prop_[x_id]) * V_MAX(vs_prop_[z_id])TTL_CTR_V);
		if (V_IS_EMPTY(y)) {
			cl_v_bool_del_val_m(&vs_prop_[current_cs->reif_var_id], 1 TTL_CTR_V);
			v_add_to_prop(vs_id_to_prop_, vs_prop_, convert_int (current_cs->reif_var_id));
			return;
		}

		VARS_PROP z;
		cl_v_copy_pm(&z, &vs_prop_[z_id] TTL_CTR_V);

		cl_v_del_lt_n(&changed, &z, V_MIN(vs_prop_[y_id]) / V_MAX(vs_prop_[x_id])TTL_CTR_V);
		if (V_IS_EMPTY(z)) {
			cl_v_bool_del_val_m(&vs_prop_[current_cs->reif_var_id], 1 TTL_CTR_V);
			v_add_to_prop(vs_id_to_prop_, vs_prop_, convert_int (current_cs->reif_var_id));
			return;
		}
		cl_v_del_gt_n(&changed, &z, V_MAX(vs_prop_[y_id]) / V_MIN(vs_prop_[x_id])TTL_CTR_V);
		if (V_IS_EMPTY(z)) {
			cl_v_bool_del_val_m(&vs_prop_[current_cs->reif_var_id], 1 TTL_CTR_V);
			v_add_to_prop(vs_id_to_prop_, vs_prop_, convert_int (current_cs->reif_var_id));
		}
		return;
	}

	if (prop_v_id == (unsigned int) y_id) {

		VARS_PROP x;
		cl_v_copy_pm(&x, &vs_prop_[x_id] TTL_CTR_V);

		cl_v_del_lt_n(&changed, &x, V_MIN(vs_prop_[y_id]) / V_MAX(vs_prop_[z_id])TTL_CTR_V);
		if (V_IS_EMPTY(x)) {
			cl_v_bool_del_val_m(&vs_prop_[current_cs->reif_var_id], 1 TTL_CTR_V);
			v_add_to_prop(vs_id_to_prop_, vs_prop_, convert_int (current_cs->reif_var_id));
			return;
		}
		cl_v_del_gt_n(&changed, &x, V_MAX(vs_prop_[y_id]) / V_MIN(vs_prop_[z_id])TTL_CTR_V);
		if (V_IS_EMPTY(x)) {
			cl_v_bool_del_val_m(&vs_prop_[current_cs->reif_var_id], 1 TTL_CTR_V);
			v_add_to_prop(vs_id_to_prop_, vs_prop_, convert_int (current_cs->reif_var_id));
			return;
		}

		VARS_PROP z;
		cl_v_copy_pm(&z, &vs_prop_[z_id] TTL_CTR_V);

		cl_v_del_lt_n(&changed, &z, V_MIN(vs_prop_[y_id]) / V_MAX(vs_prop_[x_id])TTL_CTR_V);
		if (V_IS_EMPTY(z)) {
			cl_v_bool_del_val_m(&vs_prop_[current_cs->reif_var_id], 1 TTL_CTR_V);
			v_add_to_prop(vs_id_to_prop_, vs_prop_, convert_int (current_cs->reif_var_id));
			return;
		}
		cl_v_del_gt_n(&changed, &z, V_MAX(vs_prop_[y_id]) / V_MIN(vs_prop_[x_id])TTL_CTR_V);
		if (V_IS_EMPTY(z)) {
			cl_v_bool_del_val_m(&vs_prop_[current_cs->reif_var_id], 1 TTL_CTR_V);
			v_add_to_prop(vs_id_to_prop_, vs_prop_, convert_int (current_cs->reif_var_id));
		}
		return;
	}

	// prop_v_id == z_id
	VARS_PROP x;
	cl_v_copy_pm(&x, &vs_prop_[x_id] TTL_CTR_V);

	cl_v_del_lt_n(&changed, &x, V_MIN(vs_prop_[y_id]) / V_MAX(vs_prop_[z_id])TTL_CTR_V);
	if (V_IS_EMPTY(x)) {
		cl_v_bool_del_val_m(&vs_prop_[current_cs->reif_var_id], 1 TTL_CTR_V);
		v_add_to_prop(vs_id_to_prop_, vs_prop_, convert_int (current_cs->reif_var_id));
		return;
	}
	cl_v_del_gt_n(&changed, &x, V_MAX(vs_prop_[y_id]) / V_MIN(vs_prop_[z_id])TTL_CTR_V);
	if (V_IS_EMPTY(x)) {
		cl_v_bool_del_val_m(&vs_prop_[current_cs->reif_var_id], 1 TTL_CTR_V);
		v_add_to_prop(vs_id_to_prop_, vs_prop_, convert_int (current_cs->reif_var_id));
		return;
	}

	VARS_PROP y;
	cl_v_copy_pm(&y, &vs_prop_[y_id] TTL_CTR_V);

	cl_v_del_lt_n(&changed, &y, V_MIN(vs_prop_[x_id]) * V_MIN(vs_prop_[z_id])TTL_CTR_V);
	if (V_IS_EMPTY(y)) {
		cl_v_bool_del_val_m(&vs_prop_[current_cs->reif_var_id], 1 TTL_CTR_V);
		v_add_to_prop(vs_id_to_prop_, vs_prop_, convert_int (current_cs->reif_var_id));
		return;
	}
	cl_v_del_gt_n(&changed, &y, V_MAX(vs_prop_[x_id]) * V_MAX(vs_prop_[z_id])TTL_CTR_V);
	if (V_IS_EMPTY(y)) {
		cl_v_bool_del_val_m(&vs_prop_[current_cs->reif_var_id], 1 TTL_CTR_V);
		v_add_to_prop(vs_id_to_prop_, vs_prop_, convert_int (current_cs->reif_var_id));
		return;
	}
}

/*
 * Propagate the domain of the variable with the ID prop_v_id through all the other variables on the same c_numb ID int_div opposite constrain
 * x != y / z
 * vs_per_c_idx - vector with all constrained variables ID per constraint, per constraint ID order
 * vs_prop_ - all CSP variables with current step values
 * current_cs - constraint that should be propagated for the variable with prop_v_id ID
 * prop_ok - will be set to 1 or 0 if the constraint is respected or not
 */
#ifndef __OPENCL_VERSION__
#if CS_IGNORE == 0
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wunused-parameter"
#endif
#endif
CUDA_FUNC void int_div_prop_opposite(CL_INTS_MEM int *vs_per_c_idx, CL_MEMORY VARS_PROP *vs_prop_, CL_CS_MEM cl_constr *current_cs, bool *prop_ok
		CS_IGNORE_FUNC TTL_CTR) {

	int x_id = vs_per_c_idx[0];
	int y_id = vs_per_c_idx[1];
	int z_id = vs_per_c_idx[2];
	bool changed;

	if (V_N_VALS(vs_prop_[x_id]) == 1 && V_N_VALS(vs_prop_[y_id]) == 1) {

		cl_v_del_val_m(&changed, &vs_prop_[z_id], V_MIN(vs_prop_[y_id]) / V_MIN(vs_prop_[x_id])TTL_CTR_V);
		if (changed) {
			if (V_IS_EMPTY(vs_prop_[z_id])) {
				*prop_ok = 0;
				return;
			}
		}

#if CL_CS_IGNORE
		cs_ignore[current_cs->c_id] = 1;
#endif
	}

	if (V_N_VALS(vs_prop_[x_id]) == 1 && V_N_VALS(vs_prop_[z_id]) == 1) {

		cl_v_del_val_m(&changed, &vs_prop_[y_id], V_MIN(vs_prop_[x_id]) * V_MIN(vs_prop_[z_id])TTL_CTR_V);
		if (changed) {
			if (V_IS_EMPTY(vs_prop_[y_id])) {
				*prop_ok = 0;
				return;
			}
		}

#if CL_CS_IGNORE
		cs_ignore[current_cs->c_id] = 1;
#endif
	}

	if (V_N_VALS(vs_prop_[y_id]) == 1 && V_N_VALS(vs_prop_[z_id]) == 1) {

		cl_v_del_lt_m(&changed, &vs_prop_[x_id], V_MIN(vs_prop_[y_id]) / V_MIN(vs_prop_[z_id])TTL_CTR_V);
		if (changed) {
			if (V_IS_EMPTY(vs_prop_[x_id])) {
				*prop_ok = 0;
				return;
			}
		}

#if CL_CS_IGNORE
		cs_ignore[current_cs->c_id] = 1;
#endif
	}
}
#ifndef __OPENCL_VERSION__
#if CS_IGNORE == 0
#pragma GCC diagnostic pop
#endif
#endif

#endif

/*
 * Decides the propagator to call for this constraint
 * vs_per_c_idx - vector with all constrained variables ID per constraint, per constraint ID order
 * vs_prop_ - all CSP variables with current step values
 * prop_v_id - ID of the variable to propagate
 * current_cs - constraint that should be propagated for the variable with prop_v_id ID
 * vs_id_to_prop_ - circular vector with the ids of the variables to propagate
 * prop_ok - will be set to 1 or 0 if the constraint is respected or not
 */
CUDA_FUNC void int_div_propagate( CL_INTS_MEM int *vs_per_c_idx, CL_MEMORY VARS_PROP *vs_prop_, unsigned int prop_v_id, CL_CS_MEM cl_constr *current_cs,
		CL_MEMORY unsigned short *vs_id_to_prop_, bool *prop_ok PROPAGATED_FUNC CS_IGNORE_FUNC TTL_CTR) {

#if CS_R_INT_DIV == 0
	int_div_prop(vs_per_c_idx, vs_prop_, vs_id_to_prop_, prop_ok TTL_CTR_V);
#if CL_STATS == 1
	*propagated = true;
#endif

#elif CS_R_INT_DIV == 1
	if (current_cs->reified == 1) {
		if (V_N_VALS(vs_prop_[current_cs->reif_var_id]) > 1) {
			int_div_reif(vs_per_c_idx, vs_prop_, prop_v_id, current_cs, vs_id_to_prop_ CS_IGNORE_CALL TTL_CTR_V);

		} else {
			if (V_MIN(vs_prop_[current_cs->reif_var_id]) == 1) {
				int_div_prop(vs_per_c_idx, vs_prop_, vs_id_to_prop_, prop_ok TTL_CTR_V);
			} else {
				int_div_prop_opposite(vs_per_c_idx, vs_prop_, current_cs, prop_ok CS_IGNORE_CALL TTL_CTR_V);
			}
#if CL_STATS == 1
			*propagated = true;
#endif
		}
	} else {
		int_div_prop(vs_per_c_idx, vs_prop_, vs_id_to_prop_, prop_ok TTL_CTR_V);
#if CL_STATS == 1
		*propagated = true;
#endif
	}
#endif
}

#endif